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Press Releases

September 20, 2011: Project “VERDI” creates innovative approach in electronic product design

June 2, 2014: European Project “VERDI” provides Universal Verification Methodology (UVM) in SystemC to Accellera Systems Initiative as new industry standard proposal

Media coverage

EDACafe: Project “VERDI” creates innovative approach in electronic product design

Fraunhofer Verbund Mikroelektronik (page 15)

‎‎‎‎‎Silicon Saxony

Wirtschaftsförderung Sachsen

LIP6

InnoVisions

www.all-electronics.de

Publications and Talks

  • DVCON 2013 participation in the session: "User Experiences at the Forefront of Mixed-Signal Design and Verification", talks:
    • M. Barnasconi, "AMS system-level design and verification for automotive applications"
    • T. Vörtler, "Mixed Signal Verification and Validation for SystemC/AMS"
    • T. Nguyen, "FPGA and AMS Test chip Approach for complex SoC product design and verification"
  • T. Vörtler, "Closing the gap between SystemC/AMS simulation and lab-based validation", CATRENE DTC, 2013
  • FDL 2013 Industrial Special Session on "Verification and Prototype Validation of Complex Heterogeneous Systems", talks:
    • T. Nguyen, "FPGA-based SoC Emulator for HW/SW Functional Verification of Sophisticated Automotive Safety Critical System"
    • I. Neumann, "Virtual Platform for Automotive Electronic Systems Development"
    • R. Lucas, "UVM Test-bench Generation Flow"
    • T. Vörtler, "System Level Verification/Validation for heterogeneous Systems"
  • GDR SOC-SIP participation:
    • UVM Compliant SystemC(AMS)-based verification framework for heterogeneous systems
  • Design and Verification Conference & Exhibition Europe (DVCon Europe) 2014:
    • T. Vörtler, T. Klotz, K. Einwich, Y. Li, Z. Wang, M.-M. Louerat, J.-P. Chaput, F. Pecheux, R. Iskander and M. Barnasconi: Enriching UVM in SystemC with AMS extensions for randomization and coverage, accepted for publication
    • R. Lucas, E. Vaumorin, P. Cuenot, Y. Li, Z. Wang, M.-M. Louerat, J.-P. Chaput, F. Pecheux, R. Iskander, M. Barnasconi, T. Vörtler, K. Einwich: Generation of UVM compliant Test Benches for Automotive Systems using IP-XACT with UVM-SystemC and SystemC AMS extensions, accepted for publication
    • P. Ehrlich, T. Vörtler and T. Nguyen: SystemC based hardware in the loop simulations for accelerated UMV-like Verification, accepted for publication
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